ld1 {v0.4s}, [r0], #16 fmla v10.4s, v16.4s, v24.s[0] fmla v11.4s, v16.4s, v24.s[1] fmla v12.4s, v16.4s, v24.s[2] fmla v13.4s, v16.4s, v24.s[3] ldr d0, [r0] // 1 cycle ...
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